Module Component
![code/modules/wiremod/components/abstract/module.dm 6](git.png)
A component that has an input, output
Vars | |
linked_ports | Linked ports that follow a first_port = second_port keyed structure. |
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Var Details
linked_ports
![code/modules/wiremod/components/abstract/module.dm 17](git.png)
Linked ports that follow a first_port = second_port
keyed structure.